As the complexity of integrated circuits increases, it becomes increasingly difficult to comprehensively test the performance of such circuits. These circuits are normally subjected to automated test procedures whereby various combinations of input signals are applied to the chip and output signals are monitored for expected results. To exhaustively test a complex integrated circuit, numerous combinations of input signals or test vectors are required.
Integrated circuits that comprise numerous circuit modules, such as may be created using cell based design, will have numerous module pin signals which would make the pin count for the circuit prohibitively large. Thus, it may not be practical to bring all such signals off chip. Furthermore, integrated circuits have numerous signals that are not accessible off-chip and it may not be possible to exercise all internal states of the circuit using input-to-output test techniques of the prior art.
An alternative approach is to mechanically probe the signal traces on the circuit chip. However, such a technique is impractical outside of a laboratory and could not be utilized for production quantities of integrated circuits.
A primary objective of the present invention is to provide a means for gaining access to internal signals of an integrated circuit for test purposes.
It is another objective of the present invention to gain such test access to internal signals without increasing the pin-outs of the integrated circuit chip.